dec3_C.vhd


--
-- 3-to-8 decoder (use with-select statement)
--

library ieee;
use ieee.std_logic_1164.all;

entity dec3_C is
     port( a : in std_logic_vector(2 downto 0);
         e : in std_logic;
         y7 : out std_logic;
         y6 : out std_logic;
         y5 : out std_logic;
         y4 : out std_logic;
         y3 : out std_logic;
         y2 : out std_logic;
         y1 : out std_logic;
         y0 : out std_logic);
end dec3_C;

architecture rtl of dec3_C is

     signal inBuf : std_logic_vector(3 downto 0);
     signal outBuf : std_logic_vector(7 downto 0);

begin

     inBuf <= e & a;

     with inBuf select
          outBuf <= "10000000" when "1111",
                 "01000000" when "1110",
                 "00100000" when "1101",
                 "00010000" when "1100",
                 "00001000" when "1011",
                 "00000100" when "1010",
                 "00000010" when "1001",
                 "00000001" when "1000",
                 "00000000" when others;

    y7 <= outBuf(7);
    y6 <= outBuf(6);
    y5 <= outBuf(5);
    y4 <= outBuf(4);
    y3 <= outBuf(3);
    y2 <= outBuf(2);
    y1 <= outBuf(1);
    y0 <= outBuf(0);

end rtl;