countJ5st9.vhd
--
-- 5-bit jonson counter (9 state)
--
library ieee;
use ieee.std_logic_1164.all;
entity countJ5st9 is
port( c : in std_logic;
nr : in std_logic;
q : out std_logic_vector(4 downto 0));
end countJ5st9;
architecture rtl of countJ5st9 is
signal bufQ : std_logic_vector(4 downto 0);
begin
process(nr,c)
begin
if (nr = '0') then
bufQ <= (others => '0');
elsif (c'event and c = '1') then
bufQ <= bufQ(3 downto 0) & (bufQ(4) nor bufQ(3));
end if;
end process;
q <= bufQ;
end rtl;